XOR circuit

[Maverik]

Hey,

Couldn't really find a forum for this question, so I figured that this would be the best place.

The following circuit computes A XOR B, but some information has been omitted from the diagram. Each
of the 8 transistors needs to be connected to either A, or to B, or to A^-1, or to B^-1.


Click to view full size!

I think I have a rough idea of what's happening, but if someone could give some advice, or point me somewhere (my searches turned up nothing) I'd appreciate it.

Cheers,

Mav

[darren42]

I am not sure what specific information about the circuit that you are after

I found a similar circuit here http://www.ece.mtu.edu/faculty/goel/...S-Circuits.pdf on page 22. the only difference is the type of mosfets used and the different inputs to the base of each mosfet.

Have a read of the entire pdf, it should give you a good idea about how mosfets work and in the end how the XOR circuit operates

[zero_velocity]

Ok so from how I understand this, all you need to do is get an input from A and B, then you also want to make a device that inverts the input, so when A = 5V, the output will be 0V, this can be done with something like this;

                       5V
                     __| 
               ___ || NPN J-FET
              |    ||__
              |        |
    Input ----|        |--------- Output
              |      __|
              |___ || PNP J-FET
                   ||__
                        |
                      Ground

This will inverse the input (Im not sure which way the transistors are placed, you may need to swap them around). and allow a value of A-1 to be created from A, and this will also have to be repeated for B to produce B-1. -This may seem irrelevant to the question, but you cant just not connect up one line.

Unfortunately without knowing if the transistors in the diagram are NPN or PNP types its impossible to deduce anything from it.

[SLATYE]

I think they're just meant to be generic transistors, so that when the associated input (eg. "A", "!B", etc) is on the transistor passes current, and when the associated input is off the transistor blocks all current.

It's pretty simple to understand. Draw the truth table for a 2-input XOR gate. That'll have four lines. Each line corresponds to one of the 'arms' in your diagram.

[Maverik]

Ah, thanks for your help everyone! Sorry I wasn't specific about what the question was asking, that's all the information I was given. Thanks slatye.

[darren42]

Originally Posted by zero_velocity

Unfortunately without knowing if the transistors in the diagram are NPN or PNP types its impossible to deduce anything from it.

The circuit symbol used to represent the mosfets mean that they would be the n-type. this means that when the input to the base is high, current can flow between the drain and the source.

[zero_velocity]

Originally Posted by darren42

The circuit symbol used to represent the mosfets mean that they would be the n-type. this means that when the input to the base is high, current can flow between the drain and the source.

Please elaborate? i.e. what in that circuit diagram suggests the fets are for one mosfets then how the diagram suggests they are all npn.... I'm just curious as to how this is shown, as by the diagram I would have presumed them be j-fets and NPN but it seems you can only make the assumption from my understanding...

Also, feel free to correct me if i am wrong, but a quick truth table i did showed that for the inputs, shorts and open circuits will be produced :S

[darren42]

These are the schematic symbols i learnt to use for J-FETs and MOSFETs, so i believe that they are mosfets

J-FET



MOSFET



But i do agree that the cirucit in the op is incomplete as the output is always low

[zero_velocity]

Ah see, when I went through, J-FET's were drawn the same as MOSFETS without the drain... and they were all drawn as seen in pic 2 in the bottom left, and it was up to labelling the component as necessary.... ill take note of those thanks man

[2xCPU]

Originally Posted by Maverik

.. that's all the information I was given.

This isn't a homework question is it?

2.

[Annirak]

Originally Posted by zero_velocity

Ah see, when I went through, J-FET's were drawn the same as MOSFETS without the drain... and they were all drawn as seen in pic 2 in the bottom left, and it was up to labelling the component as necessary.... ill take note of those thanks man

As near as I can tell, the simplified MOSFETs there are only used in IC drawings. At least as I've gone through, the only classes where I've seen them are IC classes. The body connection is always shown on power devices and discretes, but seems to be optional in ICs. I believe that this is because of the complexity involved in drawing a connection between all the bodies on an IC (which is physically how they are connected).

[chrispychipS]

Originally Posted by Annirak

As near as I can tell, the simplified MOSFETs there are only used in IC drawings. At least as I've gone through, the only classes where I've seen them are IC classes. The body connection is always shown on power devices and discretes, but seems to be optional in ICs. I believe that this is because of the complexity involved in drawing a connection between all the bodies on an IC (which is physically how they are connected).

False, the body connection is not shown only for simplicity, assumed to be connected to the most negative or positive supply.
Power devices and other discretes are all ICs, and IC design most definitely take into consideration of the body effect.
I believe this is out of the scope of what the OP needs to know.
What the OP needs to do is search up how to draw CMOS logic circuits.
(tip: really simple, made up of pull up and pull down networks, don't over think the difficulty)
Certain this is a homework question, hence I will not give a solution.

[Maverik]

Originally Posted by 2xCPU

This isn't a homework question is it?
2.

It was something briefly mentioned in a computing lecture at uni, but had nothing to do with the course. Our of interest I asked here, but thanks for all the help.