Code wise - it's open source. Brains wise - there's certainly a lot more people mucking about with FPGA code these days. Most of the cores in MiSTer were ported over from MiST cores written by other people. Jotego certainly puts a hell of a lot of work in, but I think there exists a few people who could do what he does, and have the desire to do so. GitHub has a growing number of VHDL and Verilog projects outside of MiST/MiSTer too, so it's certainly not limited to our little niche interest.