Ryzen 5000 Series Discussion

Discussion in 'AMD x86 CPUs and chipsets' started by Skramit, Nov 7, 2019.

  1. RnR

    RnR Member

    Joined:
    Oct 9, 2002
    Messages:
    16,678
    Location:
    Brisbane
     
    M1ck1 and MUTMAN like this.
  2. nCrypt

    nCrypt Member

    Joined:
    Feb 12, 2010
    Messages:
    2,385
    Location:
    Melbourne
    I have a 3900x/3700x/3600 CPU-s at present.

    Come Zen3, 2 of them will be sold, undecided on which two yet!

    I have presently
    Asus X570 Crosshair Impact - on the best boards i have ever used period
    Asus B450 STRIX -- Solid board, OC the 3700X easily.

    Most boards will be fine. If you dont intend to OC
     
  3. 335 GT

    335 GT Member

    Joined:
    Aug 3, 2019
    Messages:
    1,136
    Location:
    W.A.
    5800 or 5900?

    I've got a 3700 as that's what the shop had 2 days after release and I don't use the 8 cores.

    But I have a small Dick.

    Decisions...
     
    MUTMAN likes this.
  4. kieran

    kieran Member

    Joined:
    Aug 27, 2003
    Messages:
    223
    Location:
    Melbourne
    Question: If I have an x570 board with 2 M2 nvme slots stuffed with, say, Samsung 980 pros.. will I get full speed from both without a board stealing bandwidth on, say, a PCIe 4 connected GPU and a PCIe 3 connected sound card? (Or more likely, the second m2 drive running at lower speed if bandwidth is preferred elsewhere by the motherboard)…‽
     
  5. adamsleath

    adamsleath Member

    Joined:
    Oct 17, 2006
    Messages:
    19,153
    Location:
    Sunnybank Q 4109
    wait for benches.

    ive heard this since the beginning of the amd moar cores , back with phenom and how with ryzens.
    that moar cores yields a smoother experience.

    the tech deals dude yaps on about it.
     
  6. MUTMAN

    MUTMAN Member

    Joined:
    Jun 27, 2001
    Messages:
    9,230
    Location:
    4109
    PCIE is just under 2000MB/s per lane, x570 gives 4 lanes to the chipset.
    so unless that sound card is using 1GB/s then both 980's and the GPU will run at full speed

    in reality there will be other factors at play that slow things down though, so it's not really a big problem.
    b550 would see things slow down on the SSD on the chipset side, but again, lots of other stuff going on (like win 10 being stupid) so it not a 'real world' problem. just something you'll see in benchmarks
     
    kieran likes this.
  7. Ratzz

    Ratzz Member

    Joined:
    Mar 13, 2013
    Messages:
    10,318
    Location:
    Cheltenham East 3192
    There are 20 available PCIE4 lanes on the CPU, and another 4 from the chipset if you have X570.

    X570, 2x PCIE4 M.2 + 1x PCIE4 x16 GPU = yes. The second M.2 comes from the PCIE4 X570 chipset, the GPU and first M.2 come from the CPU.

    B550, you'll have only one PCIE4 M.2, you'll lose the second one because the chipset is not PCIE4, so you'll have PCIE4 to the GPU and first M.2 but the second M.2 will be PCIE3, because you'll be constrained to only 20 PCIE4 lanes.

    Both scenarios assume that you are using a PCIE4 CPU. The soundcard will be PCIE3 in both cases, unless you have an X570 board with only one M.2 slot, but I'm not aware of any. There isn't any reason not to have a second M.2, literally nothing else will need sufficient bandwidth. If a board were to support dual GPU's (only X570 supports 2x GPU) then there would be 2x PCIE4 X8, which will still leave enough lanes for 2x PCIE4 M.2's.
     
    kieran, 335 GT and nCrypt like this.
  8. chook

    chook Member

    Joined:
    Apr 9, 2002
    Messages:
    3,789
    It is all kind of hard to figure out actually.

    • Zen 2 CCD was manufactured on TSMC's 7nm process and the desktop I/O die on Global Foundries 12nm process while the server I/O die is on the Global Foundries 14nm process.
    • Zen 3 CCD will be manufactured on TSMC's 7nm+ process and the I/O die is still on the Global Foundries 12nm process. The 7nm+ process is how they maintained the power efficiency.
    • Still maximum of three chiplets per substrate.
    • Each CCD now has one CCX:
    [​IMG]

    A lot of reviewers are waiting for AMD to do their "deep dive" architecture day before talking too much about this.
    Small technicality.

    There are actually 24 PCIe 4.0 lanes on the CPU and the link from CPU to chipset runs at PCIe 4.0 but when it gets to a B550 chipset then it downclocks to PCIe 3.0 because B550 has no PCIe 4.0 support.
     
    Last edited: Oct 11, 2020
    Ratzz and MUTMAN like this.
  9. 335 GT

    335 GT Member

    Joined:
    Aug 3, 2019
    Messages:
    1,136
    Location:
    W.A.
    And it gets better.
    Like with your plan, stripe 2x pcie4 ssds and have stupid fast drives. Be interested in what you get. My guess is 8-10GB/s.

    When they were launching x570 18 months ago Gigabyte striped 4 arous drives and got 15GB/s.
     
  10. Ratzz

    Ratzz Member

    Joined:
    Mar 13, 2013
    Messages:
    10,318
    Location:
    Cheltenham East 3192
    Yes, badly explained on my part. 4 lanes are unavailable to B550 because those lanes lead to a PCIE3 chipset, so B550 only has 20 PCIE4 lanes available to it. X570 has access to those extra 4 lanes via the PCIE4 chipset, allowing a second M.2.
     
  11. RnR

    RnR Member

    Joined:
    Oct 9, 2002
    Messages:
    16,678
    Location:
    Brisbane
    *Deep breath*...
    • There is no '7nm+' TSMC process. This '7nm+' is just AMD's way of saying 'same node, but betterer'.
    • There are 4 TSMC processes on this node; N7, N7p, N7+(4 layers are EUV) and N6 (5 layers are EUV). N7, N7p, and N6 are all IP compatible. N7+ is not compatible.
    • Zen 2 used N7. Zen 3 can be using N7p or N7+. N6 is not yet available afaik. Early next year.
    • I strongly believe that Zen 3 is on N7p, this would give them +7% speed on the same iso profile, with no density improvements, while still keeping all their hard work from compatible N7.
    • There is a chance that Warhol (Zen 3+) will get N6 (+20% density), but maybe it won't be ready in time. Rembrandt is showing N6 usage.
     
  12. Ratzz

    Ratzz Member

    Joined:
    Mar 13, 2013
    Messages:
    10,318
    Location:
    Cheltenham East 3192

    To achieve that, they would have needed to place an additional pair of drives on an add-in card in the second X16 slot, which would have then become a X8 slot, and left only X8 for the GPU. Should be no issue with that, PCIE4 X8 would be nearly as good as PCIE3 X16 anyway. So 2 drives there, + another M.2 from the CPU and a 4th from the chipset. Crazy fast.

    With NCrypt, who doesn't have the slower Corsair MP600 to (preferably) match like I do, he can start with a couple of 980 Pros to leave my striped Corsair drive in the dust.

    Or he could lash out on 4x 980 Pros for some truly absurd speed, using an add-in card, and still leaving himself PCIE4 X8 for his GPU. He'll do better than the Gigabyte setup too, because the Aorus is older tech like my MP600, and even that Gigabyte setup would also be left in the Samsung dust.

    The question that needs to be asked though, even with my lowly Corsair striped drive, is will it even be worth it? How fast does an OS drive need to be to reach diminishing returns?

    I honestly can't really notice the speed difference between my MP600 and my old 960 Pro. Sure, in benchmarks it smashes it, and the striped drives will smash that, and striped 980 Pro's will smash that, and 4x striped 980 Pro's holy fuck..

    But for actual noticeable performance.. not really that much better than an old 960 Pro.
     
    Last edited: Oct 11, 2020
  13. chook

    chook Member

    Joined:
    Apr 9, 2002
    Messages:
    3,789
    The N7P process is what I was referencing when I said 7nm+. For some reason it seems to get refered to that way by reviewers. Not entirely sure why because it just creates confusion.

    I have a tendency to get a little caught up in technicalities sometimes (sorry Ratzz) so am trying to be a little more human.

    EDIT: Actually, maybe because Intel started it so now they are all just trying to keep the same lingo going?
     
    Last edited: Oct 11, 2020
  14. 335 GT

    335 GT Member

    Joined:
    Aug 3, 2019
    Messages:
    1,136
    Location:
    W.A.
    From memory they used a pcie card and mounted all 4 drives to it.
     
  15. Ratzz

    Ratzz Member

    Joined:
    Mar 13, 2013
    Messages:
    10,318
    Location:
    Cheltenham East 3192
    That would surely lower the X16 to X8 though, leaving half the speed on the table, unless they used the primary X16 and onboard graphics?
     
  16. RnR

    RnR Member

    Joined:
    Oct 9, 2002
    Messages:
    16,678
    Location:
    Brisbane
    :thumbup:

    Don't know. Intel doesn't have the same marketing names around its processes afaik. TSMC is more open on its own website in this aspect, but maybe the confusion around Intel's processes works for it atm while its in its current 10 and 7nm mess. I vaguely recall TSMC adopting marketing names for its processes to indicate that 7nm is not at all related to the underlying transistors or design elements.
     
  17. kieran

    kieran Member

    Joined:
    Aug 27, 2003
    Messages:
    223
    Location:
    Melbourne
    Thanks Ratzz, that's nice and clear. I'm thinking x570, 5900x cpu, nvidia rtx 3080, and 2x 1tb Samsung 980 pro nvme m2 sticks, with a Creative SB AE-7 pcie3 card as well.
     
    Ratzz likes this.
  18. shirl

    shirl Member

    Joined:
    Aug 24, 2003
    Messages:
    272
    Location:
    sydney
    my son has on order a 3080 would he be better off getting b550 OR A X570? He is currently using a 3700x mated to a B450Tomahawk@ stock, which would be a better mobo to run the 3080 better??
    All replies welcome..
     
  19. dirtyd

    dirtyd Member

    Joined:
    Jan 4, 2006
    Messages:
    4,099
    Location:
    Melbs
  20. Aussiejuggalo

    Aussiejuggalo Member

    Joined:
    Sep 14, 2010
    Messages:
    3,204
    Location:
    Sunshine Coast Queensland
    I thought they said in the Zen 3 thing that it was all the same they just tweaked the design of the core chiplets to make them more efficient hence the single threaded boost but the IO was completely untouched.
     

Share This Page

Advertisement: